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About the Company: Synopsys is at the heart of more technology than you may have imagined. Chances are, any element of technology you use is enabled or influenced by Synopsys―from everyday conveniences like smartphones and wearables to mission-critical applications for medical and automotive safety.
The greatest companies around the world use our tools to design amazing things like autonomous cars, smart homes, and machines that learn. Our commitment to making silicon smarter and software more secure in cyberspace makes an impact on everything, everywhere, everyday.
For 30+ years, Synopsys has nurtured a culture of integrity and excellence that fosters creativity, care for each other, and concern for the community around us. We value diversity and different perspectives. And we embrace everyone from enthusiastic learners to world-class innovators wanting to make their mark in the era of Smart, Secure Everything.
Job Profile: Intern (Technical-Engineering)
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Requisition Number: 15714BR
Work Location: INDIA – Hyderabad
Experience 0-2 year
Hire Type: Intern
Desired Candidate Profile:
- The successful candidate will have B.Tech / M. Tech with 0-2 years of digital design experience in the industry and hands-on experience in emulation/simulation.
- Knowledge on areas like Synthesis, simulation, verification, place and route, design reuse and/or physical design is preferred.
- Knowledge and experience on Hardware emulation tool or experience in verification technology, testcase creation, simulation using VCS or other simulators, debugging with Verdi/DVE, familiarity with scripting languages is a plus along with good organization and communication skills for interacting with R&D and CAEs teams.
- Seeking a highly motivated and innovative engineer. Working as part of a highly experienced emulation team, the candidate will be contributing towards improving the quality of Synopsys Synthesis and Emulation tools.
- The position offers an excellent opportunity to work with an expert team of Synthesis and emulation engineers responsible for qualifying the FPGA synthesis tool from specification development to performing functional and performance tests for validating the Synthesis and Emulation tool.
- In addition, this is a great opportunity to work with a wide suite of in-house digital design and verification tools, including VCS, Design Compiler.
Responsibilities of this job include:
- The candidate will be responsible for validation of Emulation tool.
- The Engineer will also design and develop tests in VHDL/Verilog/System Verilog languages to validate the tool.
- Responsible for analyzing benchmarks & in-house, modifying block-level test benches, executing verification plans, debugging RTL and gate-level simulation failures, performing gate-level simulations, interacting with R&D and CAE teams.
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