Microchip Technology Off Campus Drive Hiring Freshers As Trainee Engineer For B.E/B.Tech/M.E/M.Tech


About the Company: Microchip Technology Inc. is a leading semiconductor supplier of smart, connected and secure embedded control solutions. Its easy-to-use development tools and comprehensive product portfolio enable customers to create optimal designs which reduce risk while lowering total system cost and time to market. The company’s solutions serve more than 125,000 customers across the industrial, automotive, consumer, aerospace and defense, communications and computing markets.

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Company Website: www.microchip.com

Job Profile: Trainee Engineer

Exp Needed: 0 – 1 Years

Work Location: Karnataka

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Job Description: As part of the MCU32 SoC implementation group, the successful candidate will be responsible for Physical Design related activities for 32-bit microcontrollers.

  • – Utilize hierarchical systems-level design techniques to build designs in excess of 1M gates.
  • – Design activities are focused on Physical Design Engineering support as part of a Design Team.
  • – Must be a team player and will be assigned project responsibilities from design exploration through delivery of GDS.
  • – Working on Physical Design flow research and utility development, including documentation.

Detailed job functions include:

  • * multi-voltage island-based floorplan design and support.
  • * design automation to enable early development/debug.
  • * die size estimation and bond out approval.
  • * flow development and automation implementation.
  • * timing closure support to maximize process node capability.
  • * clock tree setup/debug and synthesis for optimal QoR.
  • * general physical implementation procedures.
  • * delivering Physical Verification-clean designs.

Job Requirements

  •  Bachelor degree in Electronics or Electrical Engineering minimum
  •  Masters Degree in Electronics or Electrical Engineering or equivalent (preferred)
  •  Highly self-motivated, well organized and result oriented.
  •  Experience with Synopsys/Cadence Design tools is a plus

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